Open-Source
Vendor-provided FPGA IP blocks are often convenient — but they come with a critical limitation: no access to source code.
This lack of transparency makes it difficult to: assess quality, debug issues, meet certification requirements, adapt designs to specific needs. Our RTL blocks solve this problem. All blocks are open source (typically GPL-licensed), fully accessible, and formally verified — giving you complete control over your design.
We combine this with:
commercial support for integration and customization
ready-to-use simulation testbenches
proven deployment in real-world systems
You don’t integrate black boxes — you build on transparent, reliable foundations.
Available RTL Blocks
Available RTL Blocks
microSD & eMMC Controller
microSD & eMMC Controller
Reliable embedded mass storage for systems requiring up to 1 TB capacity.
Read/write speeds: 500 kB/s to 100 MB/s
SDR and DDR operation at up to 50 MHz
Block size: 512 bytes
~1000 IOPS, <1 ms read latency
Enables field updates via SD card in combination with a two-stage bootloader.
Verified on:
DDR3 memory controller
DDR3 memory controller
DDR3 controller and phy for Spartan7 , Artix7, Kintex7, Zynq70xx, Lattice ECP5, with a read latency of 15 nsec, bitwidths between 8 and 72, up to 8 GB storage, the workhorse of embedded storage, AXI and Wishbone interface, up to 50 Gbit/sec read and write thoughput.
Verified on Spartan7, Artix7, Kintex7
Other families on request
used in our 10 GB Ethernet switch
used in our Sonar system
AXI & Wishbone Infrastructure
AXI & Wishbone Infrastructure
Core building blocks for scalable system design.
Crossbar interconnects
Clock domain crossing modules
Bus width converters
Designed to eliminate dependency on proprietary IP.
Ethernet / IP / UDP Stack
Ethernet / IP / UDP Stack
100Mbit, 1 Gbit, 10 Gbit, Verilog, with wishbone interface, Ethernet UDP for Artix7, Kintex, Zynq70x0, Lattice ECP5
Verified on:
Ethernet & IP & UDP
Ethernet & IP & UDP
Flexible networking stack for custom communication systems.
100 Mbit, 1 Gbit, 10 Gbit
Verilog implementation
Wishbone interface
Supports Ethernet, IP, UDP
Verified on:
Video Interfaces
Video Interfaces
Complete FPGA-based video pipeline components.
DVI & HDMI (TX/RX)
Up to HD resolution @ 60 FPS
MJPEG encoder
Color correction
verified with FPGA adapters:
Trenz HDMI out cruvi adapter
verified on follwing boards:
Nexys Video
for Lattice ECP5, Xilinx , Spartan 7, Artix7, Kintex Zynq, other FPGA families on request
deployed in our 10 GB Ethernet switch , RAsentinel WIFI spectrum visualisation
Image sensor controller
Image sensor controller
Direct integration of high-speed image sensors without buffering.
Supports Sony and Omnivision sensors
MIPI CSI-2 interface
Enables:
<20 ms reaction times
200 FPS pipelines
verified with following adapters and boards
SATA Storage Controller
SATA Storage Controller
Persistent storage for FPGA-based systems.
SATA Gen1
1.5 Gbit/s SerDes
Designed for robust, high-throughput operation
Stop integrating black-box IP. Start building with full control.
Stop integrating black-box IP. Start building with full control.
Tell us what you need — we’ll help you implement it.
Tell us what you need — we’ll help you implement it.
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